With unique safeguards to assure first-time-right results
The lowest risk path to success
The advantages of ASICs and highly integrated system-on-chip solutions in terms of cost reduction and increase in performance can be immense, and we believe DELTA’s unique design-to-production flow offers you the lowest risk path to success.
We start with an extremely rigorous specification process. During the design phase itself, we use our extensive library of proven circuit IP to speed up projects, and build detailed design review and verification steps into all our designs – at specification, net list, layout and sample stages.
From feasibility study to component delivery
Our background in design-for-testability is exploited to create powerful test benches for your IC, generating in- depth test vectors for verifying quality throughout the project, from design simulation to sample and production testing.
DELTA operates a fabless ASIC design model, supported by a renowned microelectronics testing capability.
We can provide a turnkey ASIC solution – from feasibility study to component delivery – or you can access individual elements of our IC services:
- Circuit specification and design
- Foundry interface
- Wafer-level parametric, functional and life test
- Component testing
- Inventory management
Whether you simply want to transfer an existing design to ASIC, or to create a radical new concept, DELTA can help: Call or email us.
Update/approval of requirements specification
Choice of technology
Availability of IP
ASIC architecture proposal
Development plan for project
Commercial proposal for design and component delivery
DELTA has invested in the complete tool chain for ASIC projects. This comprehensive capability allows us to provide the complete end-to-end service for clients, and take total responsibility for a project, from circuit design to place-and-route. Other design houses are unable to do this.
Our design tools investments include:
Synopsis Design Compiler
Cadence analog, digital and mixed-signal tool suites including Encounter place and route and Conformal formal verification
Mentor Graphics DftAdvisor, FastScan and FlexTest tools